vu cs302 Mid Term - Quiz No.10
vu cs302 Digital Logic Design Quiz
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Question 2: The ABEL notation equivalent to Boolean expression A+B is:
A & B
A ! B
A # B
A $ B
Question 3: Which is not characteristic of a shift register?
Serial in/parallel in
Serial in/parallel out
Parallel in/serial out
Parallel in/parallel out
Question 4: Using multiplexer as parallel to serial converter requires __________ connected to the multiplexer
A parallel to serial converter circuit
A counter circuit
A BCD to Decimal decoder
A 2-to-8 bit decoder
Question 7: The divide-by-60 counter in digital clock is implemented by using two cascading counters:
Mod-6, Mod-10
Mod-50, Mod-10
Mod-10, Mod-50
Mod-50, Mod-6
Question 8: The alternate solution for a multiplexer and a register circuit is __________
Parallel in / Serial out shift register
Serial in / Parallel out shift register
Parallel in / Parallel out shift register
Serial in / Serial Out shift register
Question 9: Demultiplexer has
Single input and single outputs.
Multiple inputs and multiple outputs.
Single input and multiple outputs
Multiple inputs and single output.
