vu cs302 Mid Term - Quiz No.9
vu cs302 Digital Logic Design Quiz
This quiz belongs to book/course code vu cs302 Digital Logic Design of vu organization. We have 30 quizzes available related to the book/course Digital Logic Design. This quiz has a total of 10 multiple choice questions (MCQs) to prepare and belongs to topic Mid Term. NVAEducation wants its users to help them learn in an easy way. For that purpose, you are free to prepare online MCQs and quizzes.
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Question 1: The __________ of a ROM is the time it takes for the data to appear at the Data
Output of the ROM chip after an address is applied at the address input lines
Write Time
Recycle Time
Refresh Time
Question 3: 2's complement of any binary number can be calculated by
adding 1's complement twice
adding 1 to1's complement'
subtracting 1 from 1's complement
calculating 1's complement and inverting Most significant bit
Question 4: A.(B+ C) = A.B + A.C is the expression of
Associative Law
Demorgan' Law
Distributive Law
Commutative Law
Question 6: In __________ Q output of the last flip-flop of the shift register is connected to the data input of the first flip-flop of the shift register.
Moore machine
Meally machine
Johnson counter
Ring counter
Question 7: The 4-bit 2's complement representation of "+5" is __________
1010
1110
1011
101
Question 9: Excess-8 code assigns __________ to -8
1110
1100
1000
0
