vu cs302 Mid Term - Quiz No.14
vu cs302 Digital Logic Design Quiz
This quiz belongs to book/course code vu cs302 Digital Logic Design of vu organization. We have 30 quizzes available related to the book/course Digital Logic Design. This quiz has a total of 10 multiple choice questions (MCQs) to prepare and belongs to topic Mid Term. NVAEducation wants its users to help them learn in an easy way. For that purpose, you are free to prepare online MCQs and quizzes.
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Question 1: NOR gate is formed by connecting __________
OR Gate and then NOT Gate
NOT Gate and then OR Gate
AND Gate and then OR Gate
OR Gate and then AND Gate
Question 2: In designing any counter the transition from a current state to the next sate is determined by
Current state and inputs
Only inputs
Only current state
current state and outputs
Question 4: Cout+S3 (S2+S1) is boolean expression for
Half Adder
Full Adder
The Invalid BCD Detector Circuit
Parity Checker
Question 8: An S-R latch can be implemented by using __________ gates
AND, OR
NAND, NOR
NAND, XOR
NOT, XOR
Question 10: The power dissipation, PD, of a logic gate is the product of the
dc supply voltage and the peak current Click here for detail
dc supply voltage and the average supply current
ac supply voltage and the peak current
ac supply voltage and the average supply current
