vu mgt101 Mid Term Subjective Solved Past Paper No.1

vu mgt101 Financial Accounting Solved Past Papers

This subjective solved past paper is related to book/course code vu mgt101 Financial Accounting which belongs to vu organization. We have 4 past papers available related to the book/course Financial Accounting. This past paper has a total of 10 subjective questions belongs to topic Mid Term to get prepared. NVAEducation wants its users to help them learn in an easy way. For that purpose, you are free to get prepared for exams by learning subjective questions online on NVAEducatio.

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Question 1: Write internal and external uses of financial statements information.

Answer:

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Question 2: How we speed-up a computer?

Answer:

If a memory device is slow compared to the CPU, the CPU's speed can be made compatible by inserting wait states in the bus cycle. (Page 232)

Question 3: RTL Notation.

Answer:

RTL stands for Register Transfer Language. The Register Transfer Language provides a formal way for the description of the behavior and structure of a computer. The RTL facilitates the design process of the computer as it provides a precise, mathematical representation of its functionality. (Page 66)

Question 4: The following table shows a partial summary of the ISA for the FALCON-A. Write an assembly language program using the FALCON-A assembly language to evaluate the expression: z = 9*x + y
Note: x, y and z are names of memory locations. Your program should not change the source operands. Do not worry about the contents of x and y. There is no need to worry about assembler directives. Comments in your code may be helpful.

Answer:

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Question 5: The following table shows a partial summary of the ISA for the SRC. Write an assembly language program using the SRC assembly language to evaluate the expression:
Z= 8(a + 58) - b
Note: a, b and c are names of memory locations. Your program should not change the source operands. Do not worry about the contents of a and b. There is no need to worry about assembler directives. Comments in your code may be helpful.

Answer:

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Question 6: The following table shows a partial summary of the ISA for the SRC. Write an assembly language program using the SRC assembly language to evaluate the expression:
Z= (9 + 32a) - (16b + c)
Note: a, b and c are names of memory locations. Your program should not change the source operands. Do not worry about the contents of a and b. There is no need to worry about assembler directives. Comments in your code may be helpful.

Answer:

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Question 7: What function is performed by the reset operation of a processor. What are the two types of reset operations?

Answer:

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Question 8: What information is provided by the addressing modes of some processors?

Answer:

Addressing modes are the different ways in which the CPU generates the address of operands. In other words, they provide access paths to memory locations and CPU registers. (Page 39)

Question 9: What is the role of timing step generator in a processor?

Answer:

To ensure the correct and controlled execution of instructions in a program, and all the related operations, a timing device is required. This is to ensure that the operations of essentially different instructions do not mix up in time. There exists a 'timing step generator' that provides mutually exclusive and sequential timing intervals. (Page 152)

Question 10: What is the utility of reset operation and when it is required?

Answer:

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