Explain the Operation of Odd-Parity Generator Circuit with the-00335
This subjective question is related to the book/course
vu cs201 Introduction to Programming.
It can also be found in
vu cs201 Mid Term Solved Past Paper No. 3.
Operation of Odd-Parity Generator Circuit
The timing diagram shows the operation of the Odd-Parity generator circuit. Figure 14.3.
The A, B, C and D timing diagrams represent the changing 4-bit data values. During time interval t0 the 4-bit data value is 0000, during time interval t1, the data value changes to 1. Similarly during time intervals t2, t3, t4 up to t8 the data values change to 0010, 0011, 0100 and 1000 respectively. During interval t0 the output of the two XOR gates is 0 and 0, therefore the output of the XNOR gate is 1. At interval t1, the outputs of the two XOR gates is 1 and 0, therefore the output of the XNOR gate is 0. The output P can similarly be traced for intervals t2 to t8.
